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MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
15 years 7 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
134
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SAC
2008
ACM
15 years 2 months ago
Removing useless variables in cost analysis of Java bytecode
Automatic cost analysis has interesting applications in the context of verification and certification of mobile code. For instance, the code receiver can use cost information in o...
Elvira Albert, Puri Arenas, Samir Genaim, Germ&aac...
HPCA
2003
IEEE
16 years 3 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
IEEECIT
2009
IEEE
15 years 1 months ago
Dynamic Adaptation of the Master-Worker Paradigm
Abstract--The size, heterogeneity and dynamism of the execution platforms of scientific applications, like computational grids, make using those platforms complex. Furthermore, tod...
Françoise André, Guillaume Gauvrit, ...
DAC
2005
ACM
15 years 5 months ago
Hybrid simulation for embedded software energy estimation
Software energy estimation is a critical step in the design of energyefficient embedded systems. Instruction-level simulation techniques, despite several advances, remain too slo...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...