Sciweavers

7781 search results - page 1358 / 1557
» Experience Design
Sort
View
CASES
2005
ACM
15 years 8 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne
DAC
2005
ACM
15 years 8 months ago
How accurately can we model timing in a placement engine?
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...
Amit Chowdhary, Karthik Rajagopal, Satish Venkates...
EUROSYS
2007
ACM
15 years 8 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
15 years 8 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
ECAI
2008
Springer
15 years 8 months ago
Task Driven Coreference Resolution for Relation Extraction
Abstract. This paper presents the extension of an existing mimimally supervised rule acquisition method for relation extraction by coreference resolution (CR). To this end, a novel...
Feiyu Xu, Hans Uszkoreit, Hong Li
« Prev « First page 1358 / 1557 Last » Next »