4029 search results - page 696 / 806 » Experience with Software Watermarking |
ISCA
2008
IEEE
15 years 4 months ago
2008
IEEE
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
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CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
ISPASS
2007
IEEE
15 years 4 months ago
2007
IEEE
— The design trend towards CMPs has made the simulation of multiprocessor systems a necessity and has also made multiprocessor systems widely available. While a serial multiproce...
TASE
2007
IEEE
15 years 4 months ago
2007
IEEE
Bounded model checking (BMC) based on SAT has been introduced as a complementary method to BDD-based symbolic model checking of LTL and ACTL properties in recent years. For genera...