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93
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DAC
2005
ACM
16 years 18 days ago
Enhanced leakage reduction Technique by gate replacement
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
Lin Yuan, Gang Qu
127
Voted
DAC
2004
ACM
16 years 18 days ago
A new heuristic algorithm for reversible logic synthesis
Reversible logic has applications in many fields, including quantum computing. Synthesis techniques for reversible circuits are not well developed, even for functions with a small...
Pawel Kerntopf
WCE
2007
15 years 24 days ago
Circuit Noise Interference on Sampling Clock and Its Effect on A/D Conversion
—Clock jitter and its effects on signal-to-noise ratio (SNR) were widely investigated in the published literatures. However, most of the issues mainly focused on white-Gaussian-n...
Sun Lei, An Jianping, Wu Yanbo
95
Voted
GLVLSI
2007
IEEE
171views VLSI» more  GLVLSI 2007»
15 years 6 months ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo...
99
Voted
DAC
2006
ACM
16 years 18 days ago
Exploring compromises among timing, power and temperature in three-dimensional integrated circuits
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
Hao Hua, Christopher Mineo, Kory Schoenfliess, Amb...