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IEEEPACT
2008
IEEE
15 years 11 months ago
Multi-optimization power management for chip multiprocessors
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
Ke Meng, Russ Joseph, Robert P. Dick, Li Shang
DATE
2007
IEEE
107views Hardware» more  DATE 2007»
15 years 11 months ago
Routing table minimization for irregular mesh NoCs
The majority of current Network on Chip (NoC) architectures employ mesh topology and use simple static routing, to reduce power and area. However, regular mesh topology is unreali...
Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam...
ICC
2007
IEEE
214views Communications» more  ICC 2007»
15 years 11 months ago
Distributed ONS and its Impact on Privacy
— The EPC Network is an industry proposal to build a global information architecture for objects carrying RFID tags with Electronic Product Codes (EPC). A so-called Object Naming...
Benjamin Fabian, Oliver Günther
INFOCOM
2007
IEEE
15 years 11 months ago
Can Retransmissions of Superexponential Documents Cause Subexponential Delays?
— Consider a generic data unit of random size L that needs to be transmitted over a channel of unit capacity. The channel dynamics is modeled as an on-off process {(Ai, Ui)}i≥1...
Predrag R. Jelenkovic, Jian Tan
141
Voted
IPPS
2007
IEEE
15 years 11 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...