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CODES
2011
IEEE
14 years 3 months ago
Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends
Designing memory controllers for complex real-time and highperformance multi-processor systems-on-chip is challenging, since sufficient capacity and (real-time) performance must b...
Benny Akesson, Po-Chun Huang, Fabien Clermidy, Den...
IDA
2009
Springer
15 years 10 months ago
Selecting Computer Architectures by Means of Control-Flow-Graph Mining
Abstract Deciding which computer architecture provides the best performance for a certain program is an important problem in hardware design and benchmarking. While previous approa...
Frank Eichinger, Klemens Böhm
ICC
2008
IEEE
151views Communications» more  ICC 2008»
15 years 10 months ago
Hop-by-Hop Local Flow Control over InterPlaNetary Networks Based on DTN Architecture
—Deep space communications are an important research line in scientific community. The possibility of performing the communication between earth and other planets is an excitant ...
Floriano De Rango, Mauro Tropea, Giovanni Battista...
GECCO
2007
Springer
131views Optimization» more  GECCO 2007»
15 years 10 months ago
Using feedback to regulate gene expression in a developmental control architecture
We present what we believe is the first attempt to physically reconstruct the exploratory mechanism of genetic regulatory networks. Feedback plays a crucial role during developme...
Kester Clegg, Susan Stepney, Tim Clarke
WSC
2004
15 years 5 months ago
Applying a Cognitive Architecture to Control of Virtual Non-Player Characters
CHI Systems, under contract to the U. S. Army Research Institute, is developing an immersive training system, called Virtual Environment Cultural Training for Operational Readines...
Chris McCollum, Charles Barba, Thomas Santarelli, ...