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CAV
2008
Springer
157views Hardware» more  CAV 2008»
15 years 8 months ago
Effective Program Verification for Relaxed Memory Models
Program verification for relaxed memory models is hard. The high degree of nondeterminism in such models challenges standard verification techniques. This paper proposes a new veri...
Sebastian Burckhardt, Madanlal Musuvathi
ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
13 years 8 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
PLDI
2006
ACM
16 years 6 days ago
DieHard: probabilistic memory safety for unsafe languages
Applications written in unsafe languages like C and C++ are vulnerable to memory errors such as buffer overflows, dangling pointers, and reads of uninitialized data. Such errors ...
Emery D. Berger, Benjamin G. Zorn
ICANN
2009
Springer
16 years 25 days ago
Evolving Memory Cell Structures for Sequence Learning
The best recent supervised sequence learning methods use gradient descent to train networks of miniature nets called memory cells. The most popular cell structure seems somewhat ar...
Justin Bayer, Daan Wierstra, Julian Togelius, J&uu...
ICANNGA
2009
Springer
141views Algorithms» more  ICANNGA 2009»
15 years 11 months ago
Connection Strategies in Associative Memory Models with Spiking and Non-spiking Neurons
The problem we address in this paper is that of finding effective and parsimonious patterns of connectivity in sparse associative memories. This problem must be addressed in real n...
Weiliang Chen, Reinoud Maex, Rod Adams, Volker Ste...