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SIGMETRICS
1998
ACM
112views Hardware» more  SIGMETRICS 1998»
15 years 10 months ago
Implementing Cooperative Prefetching and Caching in a Globally-Managed Memory System
This paper presents cooperative prefetching and caching — the use of network-wide global resources (memories, CPUs, and disks) to support prefetching and caching in the presence...
Geoffrey M. Voelker, Eric J. Anderson, Tracy Kimbr...
DATE
2004
IEEE
114views Hardware» more  DATE 2004»
15 years 10 months ago
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
Zhong Wang, Xiaobo Sharon Hu
PADS
2003
ACM
15 years 11 months ago
HLA-based Adaptive Distributed Simulation of Wireless Mobile Systems
Wireless networks’ models differ from wired ones at least in the innovative dynamic effects of host-mobility and open-broadcast nature of the wireless medium. Topology changes d...
Luciano Bononi, Gabriele D'Angelo, Lorenzo Donatie...
FM
2003
Springer
108views Formal Methods» more  FM 2003»
15 years 11 months ago
Correctness of Source-Level Safety Policies
Abstract. Program certification techniques formally show that programs satisfy certain safety policies. They rely on the correctness of the safety policy which has to be establish...
Ewen Denney, Bernd Fischer 0002
CF
2007
ACM
15 years 10 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...