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ISCAS
1993
IEEE
125views Hardware» more  ISCAS 1993»
15 years 11 months ago
A VLSI Implementation of a Cascade Viterbi Decoder with Traceback
- A novel VLSI implementation of the Viterbi algorithm based on a cascade architecture is presented. Survivor sequence memory management is implemented using a new single read poin...
Gennady Feygin, Paul Chow, P. Glenn Gulak, John Ch...
DAC
1995
ACM
15 years 10 months ago
Delayed Frontal Solution for Finite-Element Based Resistance Extraction
To save memory, layout-to-circuit extractors that use the Finite-Element Method for resistance extraction usually solve the corresponding set of equations with a frontal solution ...
N. P. van der Meijs, Arjan J. van Genderen
DAC
2000
ACM
16 years 8 months ago
Embedded hardware and software self-testing methodologies for processor cores
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, ...
EUROGRAPHICS
2010
Eurographics
16 years 4 months ago
HCCMeshes: Hierarchical-Culling oriented Compact Meshes
Hierarchical culling is a key acceleration technique used to efficiently handle massive models for ray tracing, collision detection, etc. To support such hierarchical culling, bo...
Tae-Joon Kim, Yongyoung Byun, Yongjin Kim, Bochang...
221
Voted
IEEEARES
2009
IEEE
16 years 2 months ago
Defeating Dynamic Data Kernel Rootkit Attacks via VMM-Based Guest-Transparent Monitoring
—Targeting the operating system kernel, the core of trust in a system, kernel rootkits are able to compromise the entire system, placing it under malicious control, while eluding...
Junghwan Rhee, Ryan Riley, Dongyan Xu, Xuxian Jian...