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VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
16 years 3 days ago
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
103
Voted
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
15 years 8 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
15 years 8 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
15 years 5 months ago
PipeRoute: a pipelining-aware router for FPGAs
We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
Akshay Sharma, Carl Ebeling, Scott Hauck
DFT
2008
IEEE
149views VLSI» more  DFT 2008»
15 years 1 months ago
Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?
Side-channel attacks are nowadays a serious concern when implementing cryptographic algorithms. Powerful ways for gaining information about the secret key as well as various count...
Francesco Regazzoni, Thomas Eisenbarth, Luca Breve...