14 search results - page 2 / 3 » FPGA Implementation of a Prototype WDM On-Line Scheduler |
RSP
2008
IEEE
14 years 24 days ago
2008
IEEE
Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
RSP
2003
IEEE
13 years 11 months ago
2003
IEEE
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
HOTI
2002
IEEE
13 years 11 months ago
2002
IEEE
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
DATE
2006
IEEE
14 years 14 days ago
2006
IEEE
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...