353 search results - page 57 / 71 » FPGA architecture characterization for system level performa... |
78
Voted
DAC
2009
ACM
15 years 10 months ago
2009
ACM
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
JSSPP
2004
Springer
15 years 3 months ago
2004
Springer
Using a single traditional gang scheduling algorithm cannot provide the best performance for all workloads and parallel architectures. A solution for this problem is the use of...
CSUR
2006
14 years 9 months ago
2006
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
108
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CN
2006
14 years 9 months ago
2006
Performance critical services over Internet often rely on geographically distributed architectures of replicated servers. Content Delivery Networks (CDN) are a typical example whe...
75
Voted
ICPP
2007
IEEE
15 years 4 months ago
2007
IEEE
As multi-core microprocessors are becoming widely adopted, the need to extract thread-level parallelism (TLP) from single-threaded applications in a seamless fashion increases. In...