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» FPGA implementation of a Single Pass Connected Components Al...
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FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
13 years 10 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
MVA
2007
158views Computer Vision» more  MVA 2007»
13 years 5 months ago
Hybrid object labelling in digital images
The application of a technique for labelling connected components based on the classical recursive technique is studied. The recursive approach permits labelling, counting, and cha...
Julio Martín-Herrero
FPGA
2007
ACM
122views FPGA» more  FPGA 2007»
14 years 16 days ago
The shunt: an FPGA-based accelerator for network intrusion prevention
Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
Nicholas Weaver, Vern Paxson, José M. Gonz&...
IPPS
2007
IEEE
14 years 20 days ago
Advanced Shortest Paths Algorithms on a Massively-Multithreaded Architecture
We present a study of multithreaded implementations of Thorup’s algorithm for solving the Single Source Shortest Path (SSSP) problem for undirected graphs. Our implementations l...
Joseph R. Crobak, Jonathan W. Berry, Kamesh Maddur...
CASES
2008
ACM
13 years 8 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano