In recent years, IP protection of FPGA hardware designs has become a requirement for many IP vendors. In [34], Simpson and Schaumont proposed a fundamentally different approach to...
Jorge Guajardo, Sandeep S. Kumar, Geert Jan Schrij...
— We propose a VLSI architecture for the single-chip realization of 2D spatio-temporal IIR digital filters, consisting of a meshed connection of concurrent identical vector-proce...
The wavelet transform is a very popular tool in engineering for signal analysis. With respect to image compression, the new JPEG 2000 image standard incorporates wavelet transform...
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...