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RECONFIG
2008
IEEE
156views VLSI» more  RECONFIG 2008»
15 years 10 months ago
Forward-Secure Content Distribution to Reconfigurable Hardware
Confidentiality and integrity of bitstreams and authenticated update of FPGA configurations are fundamental to trusted computing on reconfigurable technology. In this paper, we pr...
David Champagne, Reouven Elbaz, Catherine H. Gebot...
DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
15 years 10 months ago
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
Pavel Kubalík, Jirí Kvasnicka, Hana ...
IPPS
2007
IEEE
15 years 10 months ago
A CAM Emulator Using Look-Up Table Cascades
An address table relates k different registered vectors to the addresses from 1 to k. An address generation function represents the address table. This paper presents a realizatio...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura
ITNG
2007
IEEE
15 years 10 months ago
FPGA-based Vector Processing for Matrix Operations
A programmable vector processor and its implementation with a field-programmable gate array (FPGA) are presented. This processor is composed of a vector core and a tightly couple...
Hongyan Yang, Sotirios G. Ziavras, Jie Hu
FPGA
2005
ACM
121views FPGA» more  FPGA 2005»
15 years 9 months ago
Floating-point sparse matrix-vector multiply for FPGAs
Large, high density FPGAs with high local distributed memory bandwidth surpass the peak floating-point performance of high-end, general-purpose processors. Microprocessors do not...
Michael DeLorimier, André DeHon