1862 search results - page 140 / 373 » FPGA |
147
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RECONFIG
2008
IEEE
15 years 10 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
155
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RECONFIG
2008
IEEE
15 years 10 months ago
2008
IEEE
This paper describes an efficient arithmetic processor for elliptic curve cryptography. The proposed processor consists of special architectural components, the most important of...
123
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DSD
2007
IEEE
15 years 10 months ago
2007
IEEE
In this paper, the methodology for automated design of checker for communication protocol testing is presented. Based on the level of checking, different design strategies can be ...
133
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
DSP applications can be suitably represented using Process Network Models. This paper uses a modification of Kahn Process Network to solve the problem of finding an optimum arch...
ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
