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    FCCM
    2009
    IEEE
    106views VLSI» more  FCCM 2009»
    Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators
    15 years 8 months ago
    Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators
    Download  www.comp.nus.edu.sg
    Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time al...
    Joon Edward Sim, Weng-Fai Wong, Jürgen Teich
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    138
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    FCCM
    2009
    IEEE
    316views VLSI» more  FCCM 2009»
    An FPGA Implementation for Solving Least Square Problem
    15 years 8 months ago
    An FPGA Implementation for Solving Least Square Problem
    Download  www.ece.utk.edu
    This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
    Depeng Yang, Gregory D. Peterson, Husheng Li, Junq...
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    FCCM
    2009
    IEEE
    147views VLSI» more  FCCM 2009»
    FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks
    15 years 8 months ago
    FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks
    Download  www.doc.ic.ac.uk
    Artificial neural networks are a key tool for researchers attempting to understand and replicate the behaviour and intelligence found in biological neural networks. Software simul...
    David Thomas, Wayne Luk
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    ASPDAC
    2004
    ACM
    113views Hardware» more  ASPDAC 2004»
    Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
    15 years 8 months ago
    Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
    Download  www.cs.york.ac.uk
    - Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
    Chi-Chou Kao, Yen-Tai Lai
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    DATE
    2004
    IEEE
    127views Hardware» more  DATE 2004»
    Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA
    15 years 8 months ago
    Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA
    Download  www.cad.polito.it
    M. Bellato, Paolo Bernardi, D. Bortolato, A. Cande...
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