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FCCM
2009
IEEE
171views VLSI» more  FCCM 2009»
15 years 11 months ago
Accelerating SPICE Model-Evaluation using FPGAs
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
Nachiket Kapre, André DeHon
CODES
2007
IEEE
15 years 10 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
IPPS
2007
IEEE
15 years 10 months ago
Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs
1 FPGAs are an appealing solution for the space-based remote sensing applications. However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to single-e...
Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas A...
ROBIO
2006
IEEE
469views Robotics» more  ROBIO 2006»
15 years 10 months ago
FPGA-Implementation of Inverse Kinematics and Servo Controller for Robot Manipulator
- The implementation of inverse kinematics and servo controller for robot manipulator using FPGA (Field Programmer Gate Array) is investigated in this paper. Firstly, the mathemati...
Ying-Shieh Kung, Kuan-Hsuan Tseng, Chia-Sheng Chen...
CASES
2006
ACM
15 years 10 months ago
Syntax-driven implementation of software programming language control constructs and expressions on FPGAs
This paper considers the efficient parallel implementation of control constructs and expressions written in a common software programming language and synthesised to FPGA platform...
Neil C. Audsley, Michael Ward