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ASAP
2006
IEEE
121views Hardware» more  ASAP 2006»
15 years 8 months ago
Reconfigurable Fixed Point Dense and Sparse Matrix-Vector Multiply/Add Unit
In this paper, we propose a reconfigurable hardware accelerator for fixed-point-matrix-vector-multiply/add operations, capable to work on dense and sparse matrices formats. The pr...
Humberto Calderon, Stamatis Vassiliadis
157
Voted
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
15 years 8 months ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
15 years 8 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
FPL
2006
Springer
140views Hardware» more  FPL 2006»
15 years 8 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
149
Voted
FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
15 years 8 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi