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ERSA
2006
109views Hardware» more  ERSA 2006»
15 years 6 months ago
Synthesis of Object Oriented Models on Reconfigurable Hardware
Abstract-- In this work the problem of modeling reconfigurable systems behavior with a precise, executable semantics is considered. The possibility of synthesising such models onto...
Giovanni Agosta, Francesco Bruschi, Marco D. Santa...
TSP
2008
82views more  TSP 2008»
15 years 5 months ago
Fully Parallel Stochastic LDPC Decoders
Stochastic decoding is a new approach to iterative decoding on graphs. This paper presents a hardware architecture for fully parallel stochastic low-density parity-check (LDPC) dec...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
JUCS
2007
107views more  JUCS 2007»
15 years 5 months ago
New Advances in Reconfigurable Computing and its Applications
: In this work we present a survey of different papers about reconfigurable computing and its applications. These papers treat very different reconfigurable-computing applications:...
Miguel A. Vega-Rodríguez, Juan Antonio G&oa...
DSD
2010
IEEE
111views Hardware» more  DSD 2010»
15 years 3 months ago
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
Jaroslav Borecky, Martin Kohlik, Hana Kubatova, Pa...
CLEIEJ
2010
15 years 2 months ago
High Throughput and Low Cost Architecture for the Forward Quantization of the H.264/AVC Video Compression Standard
This work presents a dedicated hardware design for the Forward Quantization Module (Q module) of the H.264/AVC Video Coding Standard, using optimized multipliers. The goal of this...
Felipe Sampaio, Daniel Palomino, Robson Dornelles,...