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RTSS
2006
IEEE
15 years 3 months ago
Run-Time Services for Hybrid CPU/FPGA Systems on Chip
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
Jason Agron, Wesley Peck, Erik Anderson, David L. ...
VTS
2006
IEEE
122views Hardware» more  VTS 2006»
15 years 3 months ago
Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions
We tackle the problem of fault-free assumptions in current PLB and interconnect built-in-self-test (BIST) techniques for FPGAs. These assumptions were made in order to develop stro...
Vishal Suthar, Shantanu Dutt
CODES
2005
IEEE
15 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
FCCM
2005
IEEE
132views VLSI» more  FCCM 2005»
15 years 3 months ago
Hardware Factorization Based on Elliptic Curve Method
The security of the most popular asymmetric cryptographic scheme RSA depends on the hardness of factoring large numbers. The best known method for factorization large integers is ...
Martin Simka, Jan Pelzl, Thorsten Kleinjung, Jens ...
PACT
2005
Springer
15 years 3 months ago
Optimal Behavior of a Moving Creature in the Cellular Automata Model
The goal of our investigation is to find automatically the best rule for a cell in the cellular automata model. The cells are either of type Obstacle, Empty or Creature. Only Crea...
Mathias Halbach, Rolf Hoffmann