1862 search results - page 91 / 373 » FPGA |
153
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GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
126
Voted
ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
102
Voted
RTAS
2007
IEEE
15 years 10 months ago
2007
IEEE
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
128
Voted
CHES
2007
Springer
15 years 9 months ago
2007
Springer
The hardness of the integer factorization problem assures the security of some public-key cryptosystems including RSA, and the number field sieve method (NFS), the most efficient ...
129
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FPL
2007
Springer
15 years 9 months ago
2007
Springer
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...