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ICCAD
1995
IEEE
163views Hardware» more  ICCAD 1995»
15 years 3 months ago
Signal integrity optimization on the pad assignment for high-speed VLSI design
Pad assignment with signal integrity optimization is very important for high-speed VLSI design. In this paper, an efficient method is proposed to effectively minimize both simulta...
Kai-Yuan Chao, D. F. Wong
ASPDAC
1999
ACM
116views Hardware» more  ASPDAC 1999»
15 years 4 months ago
An Automatic Router for the Pin Grid Array Package
A Pin-Grid-Array (PGA) package router is presented in this paper. Given a chip cavity with a number of I/O pads around its boundary and an equivalent number of pins distributed on...
Shuenn-Shi Chen, Jong-Jang Chen, Sao-Jie Chen, Chi...
ASPDAC
2007
ACM
131views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign
Deep submicron effects drive the complication in designing chips, as well as in package designs and communications between package and board. As a result, the iterative interface d...
Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen
BMCBI
2011
14 years 3 months ago
PI: An open-source software package for validation of the SEQUEST result and visualization of mass spectrum
Background: Tandem mass spectrometry (MS/MS) has emerged as the leading method for high- throughput protein identification in proteomics. Recent technological breakthroughs have d...
Yantao Qiao, Hong Zhang, Dongbo Bu, Shiwei Sun
ATMOS
2007
129views Optimization» more  ATMOS 2007»
15 years 1 months ago
Solving a Real-World Train Unit Assignment Problem
We face a real-world train unit assignment problem for an operator running trains in a regional area. Given a set of timetabled train trips, each with a required number of passenge...
Valentina Cacchiani, Alberto Caprara, Paolo Toth