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EH
2002
IEEE
112views Hardware» more  EH 2002»
15 years 4 months ago
Evolving Circuits in Seconds: Experiments with a Stand-Alone Board-Level Evolvable System
The purpose of this paper is twofold: first, to illustrate a stand-alone board-level evolvable system (SABLES) and its performance, and second to illustrate some problems that occ...
Adrian Stoica, Ricardo Salem Zebulum, Michael I. F...
IPPS
2007
IEEE
15 years 6 months ago
Power-Aware Routing for Well-Nested Communications On The Circuit Switched Tree
Although algorithms that employ dynamic reconfiguration are extremely fast, they need the underlying architecture to change structure very rapidly, possibly at each step of the c...
Hatem M. El-Boghdadi
ICCAD
2002
IEEE
160views Hardware» more  ICCAD 2002»
15 years 4 months ago
Folding of logic functions and its application to look up table compaction
The paper describes the folding method of logic functions to reduce the size of memories for keeping the functions. The folding is based on the relation of fractions of logic func...
Shinji Kimura, Takashi Horiyama, Masaki Nakanishi,...
ISQED
2010
IEEE
128views Hardware» more  ISQED 2010»
15 years 1 months ago
A novel all-digital fractional-N frequency synthesizer architecture with fast acquisition and low spur
Digital implementation of analog function is becoming attractive in CMOS ICs, given the low supply voltage of ultra-scaled process. The conventional fractional-N frequency synthes...
Jun Zhao, Yong-Bin Kim
ICESS
2004
Springer
15 years 5 months ago
Relating FFTW and Split-Radix
Recent work showed that staging and abstract interpretation can be used to derive correct families of combinatorial circuits, and illustrated this technique with an in-depth analys...
Oleg Kiselyov, Walid Taha