418 search results - page 30 / 84 » Fast Integrated Tools for Circuit Design with FPGAs |
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
DAC
1996
ACM
15 years 2 months ago
1996
ACM
Abstract-An efficient full-wave electromagnetic analysis tool would be useful in many aspects of engineering design. Development of integral-equation based tools has been hampered ...
TVLSI
1998
14 years 9 months ago
1998
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...
DSD
2010
IEEE
14 years 10 months ago
2010
IEEE
Abstract—Continuously shrinking feature sizes cause an increasing vulnerability of digital circuits. Manufacturing failures and transient faults may tamper the functionality. Aut...
FPGA
2004
ACM
15 years 3 months ago
2004
ACM
As FPGA densities increase, partitioning-based FPGA placement approaches are becoming increasingly important as they can be used to provide high-quality and computationally scalab...