Sciweavers

418 search results - page 57 / 84
» Fast Integrated Tools for Circuit Design with FPGAs
Sort
View
CHES
2009
Springer
171views Cryptology» more  CHES 2009»
15 years 10 months ago
Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering
Abstract. The general trend in semiconductor industry to separate design from fabrication leads to potential threats from untrusted integrated circuit foundries. In particular, mal...
Christof Paar, Lang Lin, Markus Kasper, Tim Gü...
FPGA
2006
ACM
111views FPGA» more  FPGA 2006»
15 years 1 months ago
FPGA clock network architecture: flexibility vs. area and power
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...
Julien Lamoureux, Steven J. E. Wilton
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
15 years 6 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 2 months ago
Round-Robin Arbiter Design and Generation
In this paper, we introduce a Round–robin Arbiter Generator (RAG) tool. The RAG tool can generate a design for a Bus Arbiter (BA). The BA is able to handle the exact number of b...
Vincent John Mooney III, George F. Riley, Eung S. ...
ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
15 years 3 months ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar