85 search results - page 13 / 17 » Fast Out-Of-Order Processor Simulation Using Memoization |
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
89
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RT
2004
Springer
15 years 5 months ago
2004
Springer
With the advancements in realtime ray tracing and new global illumination algorithms we are now able to render the most important illumination effects at interactive rates. One of...
IAJIT
2010
14 years 10 months ago
2010
: A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering pro...
142
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HIPEAC
2011
Springer
13 years 11 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...