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» Fast Simulation Techniques for Design Space Exploration
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CCR
2005
103views more  CCR 2005»
14 years 9 months ago
Part III: routers with very small buffers
Internet routers require buffers to hold packets during times of congestion. The buffers need to be fast, and so ideally they should be small enough to use fast memory technologie...
Mihaela Enachescu, Yashar Ganjali, Ashish Goel, Ni...
89
Voted
CCS
2011
ACM
13 years 9 months ago
Policy auditing over incomplete logs: theory, implementation and applications
We present the design, implementation and evaluation of an algorithm that checks audit logs for compliance with privacy and security policies. The algorithm, which we name reduce,...
Deepak Garg, Limin Jia, Anupam Datta
ISCA
2003
IEEE
150views Hardware» more  ISCA 2003»
15 years 2 months ago
Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...
Dan Ernst, Andrew Hamel, Todd M. Austin
EVOW
2001
Springer
15 years 2 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
SMA
2008
ACM
157views Solid Modeling» more  SMA 2008»
14 years 9 months ago
Interactive physically-based shape editing
We present an alternative approach to standard geometric shape editing using physically-based simulation. With our technique, the user can deform complex objects in real-time. The...
Johannes Mezger, Bernhard Thomaszewski, Simon Pabs...