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CODES
2006
IEEE
15 years 4 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
DAC
2008
ACM
15 years 11 months ago
Multithreaded simulation for synchronous dataflow graphs
Synchronous dataflow (SDF) has been successfully used in design tools for system-level simulation of wireless communication systems. Modern wireless communication standards involv...
Chia-Jui Hsu, José Luis Pino, Shuvra S. Bha...
ANSS
2002
IEEE
15 years 2 months ago
Statistical Simulation of Symmetric Multiprocessor Systems
Statistical simulation is driven by a stream of randomly generated instructions, based on statistics collected during a single detailed simulation. This method can give accurate p...
Sébastien Nussbaum, James E. Smith
DAC
2008
ACM
15 years 11 months ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
ICRA
2010
IEEE
151views Robotics» more  ICRA 2010»
14 years 8 months ago
Design and control of motion compensation cardiac catheters
Robotic cardiac catheters have the potential to revolutionize heart surgery by extending minimally invasive techniques to complex surgical repairs inside the heart. However, cathet...
Samuel B. Kesner, Robert D. Howe