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INFOCOM
2003
IEEE
15 years 4 months ago
Fast Incremental Updates for Pipelined Forwarding Engines
— Pipelined ASIC architectures are increasingly being used in forwarding engines for high speed IP routers. We explore optimization issues in the design of memory-efficient data...
Anindya Basu, Girija J. Narlikar
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
15 years 8 months ago
Fast and accurate transaction level models using result oriented modeling
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
Gunar Schirner, Rainer Dömer
80
Voted
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
15 years 3 months ago
Transformational partitioning for co-design of multiprocessor systems
This paper presents the underlying methodology of Cosmos, an interactive approach for hardware software co-design capable of handling multiprocessor systems and distributed archit...
Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ah...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 3 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
82
Voted
ASAP
2007
IEEE
95views Hardware» more  ASAP 2007»
15 years 6 months ago
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
Sumit D. Mediratta, Jeffrey T. Draper