Sciweavers

531 search results - page 88 / 107
» Field-Programmable Gate Arrays
Sort
View
DAC
1996
ACM
15 years 2 months ago
Characterization and Parameterized Random Generation of Digital Circuits
The development of new Field-Programmed, MaskProgrammed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the arc...
Michael D. Hutton, Jerry P. Grossman, Jonathan Ros...
ISLPED
1996
ACM
69views Hardware» more  ISLPED 1996»
15 years 2 months ago
Substrate noise influence on circuit performance in variable threshold-voltage scheme
- This paper investigates substrate noise influence on circuit performance in a variable thresholdvoltage scheme (VT scheme) where threshold voltage is dynamically varied by substr...
Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Tosh...
ISCAS
1993
IEEE
133views Hardware» more  ISCAS 1993»
15 years 2 months ago
An efficient FIR filter architecture
– This paper describes an efficient architecture for FIR filters. By exploiting the reduced complexity made possible by the use of sparse powers-of-two coefficients, an FIR ...
Joseph B. Evans
EUROGP
2000
Springer
116views Optimization» more  EUROGP 2000»
15 years 1 months ago
An Extrinsic Function-Level Evolvable Hardware Approach
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
Tatiana Kalganova
FPL
2000
Springer
116views Hardware» more  FPL 2000»
15 years 1 months ago
High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
Abstract. Field-programmable gate arrays (FPGAs) have become increasingly interesting in system design and due to the rapid technological progress ever larger devices are commercia...
Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard ...