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COMBINATORICA
2008
84views more  COMBINATORICA 2008»
15 years 1 months ago
Parity check matrices and product representations of squares
Let NF(n, k, r) denote the maximum number of columns in an n-row matrix with entries in a finite field F in which each column has at most r nonzero entries and every k columns are...
Assaf Naor, Jacques Verstraëte
ICCV
2005
IEEE
16 years 3 months ago
Dynamic Measurement Clustering to Aid Real Time Tracking
Many parameter estimation problems admit divide and conquer or partitioning techniques in order to reduce a highdimensional task into several reduced-dimension problems. These tec...
Christopher Kemp, Tom Drummond
DAC
2004
ACM
16 years 2 months ago
Post-layout logic optimization of domino circuits
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
Aiqun Cao, Cheng-Kok Koh
ATS
2009
IEEE
99views Hardware» more  ATS 2009»
15 years 8 months ago
Test Generation for Designs with On-Chip Clock Generators
High performance designs often use the on-chip device PLLs for accurate test clock generation during testing. The on-chip clock generator is designed in a programmable way to faci...
Xijiang Lin, Mark Kassab
ENTCS
2007
123views more  ENTCS 2007»
15 years 1 months ago
Proving Termination of Context-Sensitive Rewriting with MU-TERM
Context-sensitive rewriting (CSR) is a restriction of rewriting which forbids reductions on selected arguments of functions. Proving termination of CSR is an interesting problem w...
Beatriz Alarcón, Raúl Gutiérr...