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» Finding optimal hardware software partitions
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2006
ACM
15 years 1 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
CC
2008
Springer
193views System Software» more  CC 2008»
14 years 11 months ago
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...
Uday Bondhugula, Muthu Manikandan Baskaran, Sriram...
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 3 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky
DAC
2009
ACM
15 years 10 months ago
Non-intrusive dynamic application profiling for multitasked applications
Application profiling ? the process of monitoring an application to determine the frequency of execution within specific regions ? is an essential step within the design process f...
Karthik Shankar, Roman L. Lysecky
CGO
2004
IEEE
15 years 1 months ago
Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication ...
Antonia Zhai, Christopher B. Colohan, J. Gregory S...