1563 search results - page 118 / 313 » Flexible instruction processors |
116
Voted
CGO
2009
IEEE
15 years 7 months ago
2009
IEEE
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
128
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EH
2004
IEEE
15 years 4 months ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
100
Voted
ICCD
2003
IEEE
15 years 9 months ago
2003
IEEE
The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce ...
104
Voted
CC
2003
Springer
15 years 6 months ago
2003
Springer
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
RTCSA
1999
IEEE
15 years 5 months ago
1999
IEEE
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...