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ERSA
2008
185views Hardware» more  ERSA 2008»
15 years 1 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George
WSC
2000
15 years 1 months ago
Using simulation to support implementation of flexible manufacturing Cell
A simulation model was developed and tested using Taylor II to justify the implementation of a Flexible Manufacturing Cell (FMC). The current production capacity at the existing C...
Kambiz Farahmand
ICCAD
2010
IEEE
146views Hardware» more  ICCAD 2010»
14 years 10 months ago
Through-silicon-via management during 3D physical design: When to add and how many?
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Ky...
KIVS
2009
Springer
15 years 6 months ago
Practical Rate-Based Congestion Control for Wireless Mesh Networks
We introduce an adaptive pacing scheme to overcome the drawbacks of TCP in wireless mesh networks with Internet connectivity. The pacing scheme is implemented at the wireless TCP s...
Sherif M. ElRakabawy, Christoph Lindemann
RAS
2006
97views more  RAS 2006»
14 years 11 months ago
Visuo-motor learning for face-to-face pass between heterogeneous humanoids
Humanoid behavior generation is one of the most formidable issues due to its complicated structure with many degrees of freedom. This paper proposes a controller for a humanoid to...
Masaki Ogino, Masaaki Kikuchi, Minoru Asada