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CODES
2006
IEEE
15 years 5 months ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran
DSN
2005
IEEE
15 years 5 months ago
On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core
1 In sub-micron technology circuits high integration levels coupled with the increased sensitivity to soft errors even at ground level make the task of guaranteeing systems’ depe...
Paolo Bernardi, Leticia Maria Veiras Bolzani, Maur...
MSE
2005
IEEE
153views Hardware» more  MSE 2005»
15 years 5 months ago
ipPROCESS: Using a Process to Teach IP-Core Development
The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. ...
Marilia Lima, Andre Aziz, Diogo José Costa ...
ASPDAC
2004
ACM
130views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Automatic process migration of datapath hard IP libraries
— While essential for high-performance circuit design, the custom nature of datapath components confines their use in only a few microprocessor companies. The reusability of dat...
Fang Fang, Jianwen Zhu
MSE
2003
IEEE
103views Hardware» more  MSE 2003»
15 years 5 months ago
Teaching IP Core Development: An Example
The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) co...
Aleksandar Milenkovic, David Fatzer