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» Formal Methods for Networks on Chips
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FM
2008
Springer
127views Formal Methods» more  FM 2008»
14 years 11 months ago
A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS
TLM (Transaction-Level Modeling) was introduced to cope with the increasing complexity of Systems-on-Chip designs by raising the modeling level. Currently, TLM is primarily used fo...
Olivier Ponsini, Wendelin Serwe
CIKM
2004
Springer
15 years 3 months ago
SWAM: a family of access methods for similarity-search in peer-to-peer data networks
Peer-to-peer Data Networks (PDNs) are large-scale, selforganizing, distributed query processing systems. Familiar examples of PDN are peer-to-peer file-sharing networks, which su...
Farnoush Banaei Kashani, Cyrus Shahabi
75
Voted
APL
1993
ACM
15 years 1 months ago
Identification of Parallelism in Neural Networks by Simulation with Language J.
: The problem of a finding of ranging of the objects nearest to the cyclic relation set by the expert between objects is considered. Formalization of the problem arising at it is r...
Alexei N. Skurikhin, Alvin J. Surkan
GECCO
2010
Springer
233views Optimization» more  GECCO 2010»
15 years 2 months ago
Evolutionary-based conflict-free scheduling of collective communications on spidergon NoCs
The Spidergon interconnection network has become popular recently in multiprocessor systems on chips. To the best of our knowledge, algorithms for collective communications (CC) h...
Jirí Jaros, Vaclav Dvorak
FMCAD
2006
Springer
15 years 1 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar