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DFT
1998
IEEE
78views VLSI» more  DFT 1998»
15 years 1 months ago
A System for Evaluating On-Line Testability at the RT-level
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
Silvia Chiusano, Fulvio Corno, Matteo Sonza Reorda...
MEMOCODE
2010
IEEE
14 years 7 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
PTS
2004
94views Hardware» more  PTS 2004»
14 years 11 months ago
FSM Based Interoperability Testing Methods for Multi Stimuli Model
In this paper, we propose two fault models and methods for the derivation of interoperability test suites when the system implementation is given in the form of two deterministic c...
Khaled El-Fakih, Vadim Trenkaev, Natalia Spitsyna,...
WDAG
1993
Springer
98views Algorithms» more  WDAG 1993»
15 years 1 months ago
Fairness of N-party Synchronization and Its Implementation in a Distributed Environment
Fairness is an important concept in design and implementation of distributed systems. At the specification level, fairness usually serves as an assumption for proving liveness. At ...
Cheng Wu, Gregor von Bochmann, Ming Yu Yao
FASE
2008
Springer
14 years 11 months ago
Regular Inference for State Machines Using Domains with Equality Tests
Abstract. Existing algorithms for regular inference (aka automata learning) allows to infer a finite state machine by observing the output that the machine produces in response to ...
Therese Berg, Bengt Jonsson, Harald Raffelt