858 search results - page 120 / 172 » Formal Verification of Digital Systems |
114
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ISCAS
2011
IEEE
14 years 2 months ago
2011
IEEE
— The last two decades have seen many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation, tha...
RSP
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper addresses the need to integrate formal assertions into the modeling, implementation, and testing of statechart based designs. The paper describes an iterative process f...
113
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FMCAD
2006
Springer
15 years 2 months ago
2006
Springer
Ario is a solver for systems of linear integer arithmetic logic. Such systems are commonly used in design verification applications and are classified under Satisfiability Modulo T...
105
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ENTCS
2006
14 years 11 months ago
2006
In this study, we introduce a model transformation tool for a time-triggered language: Giotto. The tool uses graphs to represent the source code (Giotto) and the target (the sched...
99
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TCBB
2008
14 years 11 months ago
2008
The last several decades have witnessed a vast accumulation of biological data and data analysis. Many of these data sets represent only a small fraction of the system's behav...