Sciweavers

1129 search results - page 66 / 226
» Formal Verification of Websites
Sort
View
ENTCS
2010
111views more  ENTCS 2010»
14 years 11 months ago
Modular Verification of Interactive Systems with an Application to Biology
We propose an automata-based formalism for the description of biological systems that allows properties expressed in the universal fragment of CTL to be verified in a modular way....
Peter Drábik, Andrea Maggiolo-Schettini, Pa...
FM
2006
Springer
169views Formal Methods» more  FM 2006»
15 years 5 months ago
PSL Model Checking and Run-Time Verification Via Testers
Abstract. The paper introduces the construct of temporal testers as a compositional basis for the construction of automata corresponding to temporal formulas in the PSL logic. Temp...
Amir Pnueli, Aleksandr Zaks
IEEEPACT
2007
IEEE
15 years 8 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
FMCAD
2007
Springer
15 years 5 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...
MEMOCODE
2010
IEEE
14 years 12 months ago
A formal executable semantics of Verilog
This paper describes a formal executable semantics for the Verilog hardware description language. The goal of our formalization is to provide a concise and mathematically rigorous...
Patrick O'Neil Meredith, Michael Katelman, Jos&eac...