Sciweavers

1446 search results - page 111 / 290
» Formal analysis of hardware requirements
Sort
View
ISCAPDCS
2001
15 years 2 months ago
Branch Prediction of Conditional Nested Loops through an Address Queue
-Multi-dimensional applications, such as image processing and seismic analysis, usually require the optimized performance obtained from instruction-level parallelism. The critical ...
Zhigang Jin, Nelson L. Passos, Virgil Andronache
SAS
2001
Springer
166views Formal Methods» more  SAS 2001»
15 years 5 months ago
Estimating the Impact of Scalable Pointer Analysis on Optimization
This paper addresses the following question: Do scalable control-flow-insensitive pointer analyses provide the level of precision required to make them useful in compiler optimiza...
Manuvir Das, Ben Liblit, Manuel Fähndrich, Ja...
120
Voted
PLDI
1997
ACM
15 years 5 months ago
Incremental Analysis of real Programming Languages
A major research goal for compilers and environments is the automatic derivation of tools from formal specifications. However, the formal model of the language is often inadequat...
Tim A. Wagner, Susan L. Graham
PACT
2005
Springer
15 years 6 months ago
Information Flow Analysis for VHDL
We describe a fragment of the hardware description language VHDL that is suitable for implementing the Advanced Encryption Standard algorithm. We then define an Information Flow a...
Terkel K. Tolstrup, Flemming Nielson, Hanne Riis N...
105
Voted
PICS
2000
15 years 2 months ago
A Portable Image Analysis System for Performing In Situ Image Quality Measurements
Traditionally, quantitative image quality analytical methods rely on large hardware in fixed installations. There are many situations when portability is required, where these met...
David Wolin, Yair Kipman