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DAC
1997
ACM
15 years 3 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
CODES
2011
IEEE
13 years 11 months ago
Analysis and optimization of fault-tolerant task scheduling on multiprocessor embedded systems
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-tolerant techniques such as hardware replication and software re-execution are ...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...
CODES
2005
IEEE
15 years 5 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
EUROMICRO
1999
IEEE
15 years 3 months ago
An Improved Scheduling Technique for Time-Triggered Embedded Systems
In this paper we present an improved scheduling technique for the synthesis of time-triggered embedded systems. Our system model captures both the flow of data and that of control...
Paul Pop, Petru Eles, Zebo Peng
CASES
2007
ACM
15 years 3 months ago
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo K...