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DDECS
2006
IEEE
95views Hardware» more  DDECS 2006»
15 years 4 months ago
Parallel Memory Architecture for Arbitrary Stride Accesses
—Parallel memory modules can be used to increase memory bandwidth and feed a processor with only necessary data. Arbitrary stride access capability with interleaved memories is d...
Eero Aho, Jarno Vanne, Timo D. Hämäl&aum...
IPPS
2002
IEEE
15 years 2 months ago
Parallel Incremental 2D-Discretization on Dynamic Datasets
Most current work in data mining assumes that the database is static, and a database update requires rediscovering all the patterns by scanning the entire old and new database. Su...
Srinivasan Parthasarathy, Arun Ramakrishnan
IPPS
2006
IEEE
15 years 4 months ago
A calculus of functional BSP programs with projection
Bulk Synchronous Parallel ML (BSML) is an extension of the functional language Objective Caml to program Bulk Synchronous Parallel (BSP) algorithms. It is deterministic, deadlock ...
Frédéric Loulergue
KDD
2010
ACM
223views Data Mining» more  KDD 2010»
15 years 1 months ago
Frequent regular itemset mining
Concise representations of frequent itemsets sacrifice readability and direct interpretability by a data analyst of the concise patterns extracted. In this paper, we introduce an...
Salvatore Ruggieri
FPL
2001
Springer
101views Hardware» more  FPL 2001»
15 years 2 months ago
An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
This paper presents an FPGA-based implementation of a syntactic parser that can process languages generated by almost unrestricted real-life context-free grammars (CFGs). More prec...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...