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ERSA
2009
107views Hardware» more  ERSA 2009»
14 years 7 months ago
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
Kenneth C. Rovers, Marcel D. van de Burgwal, Jan K...
74
Voted
ICDCSW
2003
IEEE
15 years 3 months ago
A Flexible Web Service Based Architecture for Wireless Sensor Networks
The current sensor networks are assumed to be designed for specific applications, having strongly coupled data communication protocols. The future sensor networks are envisioned a...
Flávia Coimbra Delicato, Paulo F. Pires, Lu...
DAC
2009
ACM
15 years 10 months ago
Multicore parallel min-cost flow algorithm for CAD applications
Computational complexity has been the primary challenge of many VLSI CAD applications. The emerging multicore and manycore microprocessors have the potential to offer scalable perf...
Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng
IPPS
2007
IEEE
15 years 4 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
IEEEPACT
2006
IEEE
15 years 3 months ago
Core architecture optimization for heterogeneous chip multiprocessors
Previous studies have demonstrated the advantages of single-ISA heterogeneous multi-core architectures for power and performance. However, none of those studies examined how to de...
Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi