49 search results - page 8 / 10 » Full-system timing-first simulation |
94
Voted
SIGARCH
2008
14 years 10 months ago
2008
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
TCBB
2008
14 years 10 months ago
2008
The last several decades have witnessed a vast accumulation of biological data and data analysis. Many of these data sets represent only a small fraction of the system's behav...
104
Voted
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
81
Voted
ICPP
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...