174 search results - page 30 / 35 » Functional Test Generation for Full Scan Circuits |
92
Voted
SC
1995
ACM
15 years 1 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
75
Voted
ISMVL
2007
IEEE
15 years 3 months ago
2007
IEEE
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
ISCAS
2002
IEEE
15 years 2 months ago
2002
IEEE
We present a CMOS circuit that utilizes the back-gate effect to extend the linear range of a subthreshold MOS transconductor. Previous designs of wide-linear-range transconductors...
88
Voted
DFT
2008
IEEE
15 years 4 months ago
2008
IEEE
Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
There have been serious concerns recently about the security of microchips from hardware trojan horse insertion during manufacturing. This issue has been raised recently due to ou...