16 search results - page 3 / 4 » Functional Verification Methodology of Chameleon Processor |
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
DSD
2004
IEEE
13 years 10 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
DAC
2001
ACM
14 years 7 months ago
2001
ACM
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
DAC
2004
ACM
14 years 7 months ago
2004
ACM
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
VLSID
2002
IEEE
14 years 6 months ago
2002
IEEE
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...