142 search results - page 19 / 29 » Functional test generation for non-scan sequential circuits |
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Recent research results have shown that the traditional structural testing for delay and crosstalk faults may result in over-testing due to the non-trivial number of such faults t...
DAC
1990
ACM
15 years 1 months ago
1990
ACM
Symbolic simulation involves evaluating circuit behavior using special symbolic values to encode a range of circuit operating conditions. In one simulation run, a symbolic simulat...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
ET
2002
14 years 9 months ago
2002
In this paper we explore two alternative approaches to system diagnosis. The first strategy is based on testability analysis performed by SATAN tool. The second approach performed ...
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ET
2010
14 years 7 months ago
2010
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...