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CGO
2004
IEEE
15 years 8 months ago
Exposing Memory Access Regularities Using Object-Relative Memory Profiling
Memory profiling is the process of characterizing a program's memory behavior by observing and recording its response to specific input sets. Relevant aspects of the program&...
Qiang Wu, Artem Pyatakov, Alexey Spiridonov, Easwa...
144
Voted
CODES
2004
IEEE
15 years 8 months ago
Operation tables for scheduling in the presence of incomplete bypassing
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
150
Voted
CP
2004
Springer
15 years 8 months ago
ID Walk: A Candidate List Strategy with a Simple Diversification Device
This paper presents a new optimization metaheuristic called ID Walk (Intensification/Diversification Walk) that offers advantages for combining simplicity with effectiveness. In ad...
Bertrand Neveu, Gilles Trombettoni, Fred Glover
143
Voted
ESA
2006
Springer
140views Algorithms» more  ESA 2006»
15 years 8 months ago
Latency Constrained Aggregation in Sensor Networks
A sensor network consists of sensing devices which may exchange data through wireless communication. A particular feature of sensor networks is that they are highly energy constrai...
Luca Becchetti, Peter Korteweg, Alberto Marchetti-...
131
Voted
GECCO
2006
Springer
143views Optimization» more  GECCO 2006»
15 years 8 months ago
A hybridized genetic parallel programming based logic circuit synthesizer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung
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