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FPL
2009
Springer
100views Hardware» more  FPL 2009»
15 years 7 months ago
A virus scanning engine using a parallel finite-input memory machine and MPUs
This paper presents a virus scanning engine. After showing the difference between ClamAV (an anti-virus software) and SNORT (an intrusion detection software), we show a new archit...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura,...
126
Voted
ARC
2008
Springer
126views Hardware» more  ARC 2008»
15 years 5 months ago
DNA Physical Mapping on a Reconfigurable Platform
Reconfigurable architectures enable the hardware function to be implemented by the user and, due to its characteristics, have been used in many areas, including Bioinformatics. One...
Adriano Idalgo, Nahri Moreano
119
Voted
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
16 years 13 days ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
139
Voted
UMC
2000
15 years 7 months ago
In-vitro Transcriptional Circuits
The structural similarity of neural networks and genetic regulatory networks to digital circuits, and hence to each other, was noted from the very beginning of their study [1, 2]....
Erik Winfree
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 8 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...